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// This File Generated by:  pt_to_h.exe
// Source File:             clockdriverscdc.pt
// Destination File:        clockdriverscdc.h
 
#ifndef _clockdriverscdc_h_
#define _clockdriverscdc_h_
 
// AR_OFF -- auto registration is not needed
 
// THIS FILE IS IN THE PUBLIC DOMAIN.
// IT IS PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT
// NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
 
class CP_CDC319 : public TPart {
 
public:
  port   OUT;        // AR_BUS(9,0)  // output pins of byte 0
  port   IN;         // input
  port   OE;         // output enable (active high, internal pullup)
  port   VCC;        // 7 pins
  port   GND;        // 7 pins
  port   SCLOCK;     // serial clock (internal pullup)
  port   SDATA;      // bidirectional serial data (internal pullup)
 
  CP_CDC319() {
    SetPackage( "SSOP28", 28 );
    SetReferencePrefix( "U" );
  }
 
  virtual void Register() {
    regb( OUT, 9, 0 );
          OUT.AddPin( 9, "2" );
          OUT.AddPin( 8, "3" );
          OUT.AddPin( 7, "6" );
          OUT.AddPin( 6, "7" );
          OUT.AddPin( 5, "22" );
          OUT.AddPin( 4, "23" );
          OUT.AddPin( 3, "26" );
          OUT.AddPin( 2, "27" );
          OUT.AddPin( 1, "11" );
          OUT.AddPin( 0, "18" );
    reg(  IN );
          IN.SetPin( "9" );
    reg(  OE );
          OE.SetPin( "20" );
    reg(  VCC );
          VCC.AddPin( "1" );
          VCC.AddPin( "5" );
          VCC.AddPin( "10" );
          VCC.AddPin( "13" );
          VCC.AddPin( "19" );
          VCC.AddPin( "24" );
          VCC.AddPin( "28" );
    reg(  GND );
          GND.AddPin( "4" );
          GND.AddPin( "8" );
          GND.AddPin( "12" );
          GND.AddPin( "16" );
          GND.AddPin( "17" );
          GND.AddPin( "21" );
          GND.AddPin( "25" );
    reg(  SCLOCK );
          SCLOCK.SetPin( "15" );
    reg(  SDATA );
          SDATA.SetPin( "14" );
  }
};
 
class CP_CDC2510 : public TPart {
 
public:
  port   IN;        // "CLK"
  port   OUT;       // AR_BUS(9,0)  // "1Y9 - 1Y0"
  port   FBOUT;     
  port   FBIN;      
  port   G;         // output enable, no pullup (low --> outputs driven low)
  port   AVCC;      
  port   VCC;       // 4 pins
  port   AGND;      
  port   GND;       // 4 pins
 
  CP_CDC2510() {
    SetPackage( "TSSOP24", 24 );
    SetReferencePrefix( "U" );
  }
 
  virtual void Register() {
    reg(  IN );
          IN.SetPin( "24" );
    regb( OUT, 9, 0 );
          OUT.AddPin( 9, "21" );
          OUT.AddPin( 8, "20" );
          OUT.AddPin( 7, "17" );
          OUT.AddPin( 6, "16" );
          OUT.AddPin( 5, "15" );
          OUT.AddPin( 4, "9" );
          OUT.AddPin( 3, "8" );
          OUT.AddPin( 2, "5" );
          OUT.AddPin( 1, "4" );
          OUT.AddPin( 0, "3" );
    reg(  FBOUT );
          FBOUT.SetPin( "12" );
    reg(  FBIN );
          FBIN.SetPin( "13" );
    reg(  G );
          G.SetPin( "11" );
    reg(  AVCC );
          AVCC.SetPin( "23" );
    reg(  VCC );
          VCC.AddPin( "2" );
          VCC.AddPin( "10" );
          VCC.AddPin( "14" );
          VCC.AddPin( "22" );
    reg(  AGND );
          AGND.SetPin( "1" );
    reg(  GND );
          GND.AddPin( "6" );
          GND.AddPin( "7" );
          GND.AddPin( "18" );
          GND.AddPin( "19" );
  }
};
 
class CP_CDC2516 : public TPart {
 
public:
  port   IN;        // "CLK"
  port   OUT;       // AR_BUS(15,0)  // "4Y3 - 4Y0"
  port   FBOUT;     
  port   FBIN;      
  port   G;         // AR_BUS(3,0)  // "4G - 1G" output enable, no pullup (low --> outputs driven low)
  port   AVCC;      // 2 pins
  port   VCC;       // 8 pins
  port   AGND;      // 3 pins
  port   GND;       // 12 pins
 
  CP_CDC2516() {
    SetPackage( "SSOP48", 48 );     // TI's DGG package
    SetReferencePrefix( "U" );
  }
 
  virtual void Register() {
    reg(  IN );
          IN.SetPin( "12" );
    regb( OUT, 15, 0 );
          OUT.AddPin( 15, "42" );
          OUT.AddPin( 14, "43" );
          OUT.AddPin( 13, "46" );
          OUT.AddPin( 12, "47" );
          OUT.AddPin( 11, "26" );
          OUT.AddPin( 10, "27" );
          OUT.AddPin( 9, "30" );
          OUT.AddPin( 8, "31" );
          OUT.AddPin( 7, "23" );
          OUT.AddPin( 6, "22" );
          OUT.AddPin( 5, "19" );
          OUT.AddPin( 4, "18" );
          OUT.AddPin( 3, "7" );
          OUT.AddPin( 2, "6" );
          OUT.AddPin( 1, "3" );
          OUT.AddPin( 0, "2" );
    reg(  FBOUT );
          FBOUT.SetPin( "35" );
    reg(  FBIN );
          FBIN.SetPin( "37" );
    regb( G, 3, 0 );
          G.AddPin( 3, "40" );
          G.AddPin( 2, "33" );
          G.AddPin( 1, "16" );
          G.AddPin( 0, "9" );
    reg(  AVCC );
          AVCC.AddPin( "11" );
          AVCC.AddPin( "38" );
    reg(  VCC );
          VCC.AddPin( "1" );
          VCC.AddPin( "8" );
          VCC.AddPin( "17" );
          VCC.AddPin( "24" );
          VCC.AddPin( "25" );
          VCC.AddPin( "32" );
          VCC.AddPin( "41" );
          VCC.AddPin( "48" );
    reg(  AGND );
          AGND.AddPin( "13" );
          AGND.AddPin( "14" );
          AGND.AddPin( "36" );
    reg(  GND );
          GND.AddPin( "4" );
          GND.AddPin( "5" );
          GND.AddPin( "10" );
          GND.AddPin( "15" );
          GND.AddPin( "20" );
          GND.AddPin( "21" );
          GND.AddPin( "28" );
          GND.AddPin( "29" );
          GND.AddPin( "34" );
          GND.AddPin( "39" );
          GND.AddPin( "44" );
          GND.AddPin( "45" );
  }
};
 
class CP_CDCLVD110 : public TPart {
 
public:
  port   CK;         
  port   SI;         
  port   EN;         
  port   CLK0_P;     
  port   CLK0_N;     
  port   CLK1_P;     
  port   CLK1_N;     
  port   Q;          // AR_BUS(19,0)  // noninverting outputs at even indexes and inverting outputs at odd indexes
  port   VBB;        // 1.25V reference output
  port   VDD;        // AR_BUS(1,0)  // bus --> each pin can have its own ferrite/cap filter
  port   GND;        // 2 pins  // VSS on data sheet
 
  CP_CDCLVD110() {
    SetPackage( "TQFP32", 32 );
    SetReferencePrefix( "U" );
  }
 
  virtual void Register() {
    reg(  CK );
          CK.SetPin( "1" );
    reg(  SI );
          SI.SetPin( "2" );
    reg(  EN );
          EN.SetPin( "8" );
    reg(  CLK0_P );
          CLK0_P.SetPin( "3" );
    reg(  CLK0_N );
          CLK0_N.SetPin( "4" );
    reg(  CLK1_P );
          CLK1_P.SetPin( "6" );
    reg(  CLK1_N );
          CLK1_N.SetPin( "7" );
    regb( Q, 19, 0 );
          Q.AddPin( 19, "10" );
          Q.AddPin( 18, "11" );
          Q.AddPin( 17, "12" );
          Q.AddPin( 16, "13" );
          Q.AddPin( 15, "14" );
          Q.AddPin( 14, "15" );
          Q.AddPin( 13, "17" );
          Q.AddPin( 12, "18" );
          Q.AddPin( 11, "19" );
          Q.AddPin( 10, "20" );
          Q.AddPin( 9, "21" );
          Q.AddPin( 8, "22" );
          Q.AddPin( 7, "23" );
          Q.AddPin( 6, "24" );
          Q.AddPin( 5, "26" );
          Q.AddPin( 4, "27" );
          Q.AddPin( 3, "28" );
          Q.AddPin( 2, "29" );
          Q.AddPin( 1, "30" );
          Q.AddPin( 0, "31" );
    reg(  VBB );
          VBB.SetPin( "5" );
    regb( VDD, 1, 0 );
          VDD.AddPin( 1, "16" );
          VDD.AddPin( 0, "32" );
    reg(  GND );
          GND.AddPin( "9" );
          GND.AddPin( "25" );
  }
};
 
 
#endif

 

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