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C++BOLD Example Parts Library

$INSERT
// THIS FILE IS IN THE PUBLIC DOMAIN.
// IT IS PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT
// NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
 
$END
 
// Virtex 2 Pro in FG256:  can be used for xc2vp2fg256 or xc2vp4fg256
 
$PART_NAME XC2VP2_FG256
$JEDEC_TYPE FG256
$REF_PREFIX U
$PIN_COUNT 256
$PORTS
 
 
// configuration
  CCLK N15;
  DONE P16;
  M0 N3;
  M1 N2;
  M2 P1;
  PROG_B D1;
 
// JTAG
  TCK D16;
  TDI E1;
  TDO E16;
  TMS C16;
 
// miscellaneous
  HSWAP_EN C1;
  PWRDWN_B N14;
  RSVD D14;
  DXN D3;        // temperature diode
  DXP D2;
 
// user I/O
// order has been changed slightly so that pairs are listed P/N rather than N/P
  IO_L01P_0__VRN_0 C3;
  IO_L01N_0__VRP_0 C2;
  IO_L02P_0 C4;
  IO_L02N_0 B3;
  IO_L03P_0__VREF_0 A3;
  IO_L03N_0 A2;
  IO_L06P_0 C5;
  IO_L06N_0 D5;
  IO_L07P_0 D6;
  IO_L09P_0__VREF_0 E7;
  IO_L09N_0 E6;
  IO_L69P_0__VREF_0 C7;
  IO_L69N_0 D7;
  IO_L74P_0__GCLK6S C8;
  IO_L74N_0__GCLK7P D8;
  IO_L75P_0__GCLK4S A8;
  IO_L75N_0__GCLK5P B8;
 
  IO_L01P_1__VRN_1 C15;
  IO_L01N_1__VRP_1 C14;
  IO_L02P_1 B14;
  IO_L02N_1 C13;
  IO_L03P_1 A15;
  IO_L03N_1__VREF_1 A14;
  IO_L06P_1 D12;
  IO_L06N_1 C12;
  IO_L07N_1 D11;
  IO_L09P_1 E11;
  IO_L09N_1__VREF_1 E10;
  IO_L69P_1 D10;
  IO_L69N_1__VREF_1 C10;
  IO_L74P_1__GCLK0S D9;
  IO_L74N_1__GCLK1P C9;
  IO_L75P_1__GCLK2S B9;
  IO_L75N_1__GCLK3P A9;
 
  IO_L01P_2__VRN_2 E15;
  IO_L01N_2__VRP_2 E14;
  IO_L02P_2 F12;
  IO_L02N_2 E13;
  IO_L03P_2 F14;
  IO_L03N_2 F13;
  IO_L04P_2 F16;
  IO_L04N_2__VREF_2 F15;
  IO_L06P_2 G14;
  IO_L06N_2 G13;
  IO_L85P_2 G16;
  IO_L85N_2 G15;
  IO_L86P_2 H13;
  IO_L86N_2 G12;
  IO_L88P_2 H15;
  IO_L88N_2__VREF_2 H14;
  IO_L90P_2 J16;
  IO_L90N_2 H16;
 
  IO_L01P_3__VRN_3 M14;
  IO_L01N_3__VRP_3 M15;
  IO_L02P_3 N16;
  IO_L02N_3 M16;
  IO_L03P_3 M13;
  IO_L03N_3__VREF_3 L12;
  IO_L05P_3 L13;
  IO_L05N_3 L14;
  IO_L06P_3 L15;
  IO_L06N_3 L16;
  IO_L85P_3 K13;
  IO_L85N_3 K14;
  IO_L87P_3 K15;
  IO_L87N_3__VREF_3 K16;
  IO_L89P_3 K12;
  IO_L89N_3 J13;
  IO_L90P_3 J14;
  IO_L90N_3 J15;
 
  IO_L01P_4__INIT_B P14;
  IO_L01N_4__DOUT P15;
  IO_L02P_4__D1 P13;
  IO_L02N_4__D0 R14;
  IO_L03P_4__D3 T14;
  IO_L03N_4__D2 T15;
  IO_L06P_4__VRN_4 P12;
  IO_L06N_4__VRP_4 N12;
  IO_L07P_4__VREF_4 N11;
  IO_L09P_4__VREF_4 M10;
  IO_L09N_4 M11;
  IO_L69P_4__VREF_4 P10;
  IO_L69N_4 N10;
  IO_L74P_4__GCLK2P P9;
  IO_L74N_4__GCLK3S N9;
  IO_L75P_4__GCLK0P T9;
  IO_L75N_4__GCLK1S R9;
 
  IO_L01P_5__CS_B P2;
  IO_L01N_5__RDWR_B P3;
  IO_L02P_5__D7 R3;
  IO_L02N_5__D6 P4;
  IO_L03P_5__D5 T2;
  IO_L03N_5__D4 T3;
  IO_L06P_5__VRN_5 N5;
  IO_L06N_5__VRP_5 P5;
  IO_L07N_5__VREF_5 N6;
  IO_L09P_5 M6;
  IO_L09N_5__VREF_5 M7;
  IO_L69P_5 N7;
  IO_L69N_5__VREF_5 P7;
  IO_L74P_5__GCLK4P N8;
  IO_L74N_5__GCLK5S P8;
  IO_L75P_5__GCLK6P R8;
  IO_L75N_5__GCLK7S T8;
 
  IO_L01P_6__VRN_6 M3;
  IO_L01N_6__VRP_6 M2;
  IO_L02P_6 N1;
  IO_L02N_6 M1;
  IO_L03P_6 M4;
  IO_L03N_6__VREF_6 L5;
  IO_L05P_6 L4;
  IO_L05N_6 L3;
  IO_L06P_6 L2;
  IO_L06N_6 L1;
  IO_L85P_6 K4;
  IO_L85N_6 K3;
  IO_L87P_6 K2;
  IO_L87N_6__VREF_6 K1;
  IO_L89P_6 K5;
  IO_L89N_6 J4;
  IO_L90P_6 J3;
  IO_L90N_6 J2;
 
  IO_L01P_7__VRN_7 E2;
  IO_L01N_7__VRP_7 E3;
  IO_L02P_7 F5;
  IO_L02N_7 E4;
  IO_L03P_7 F3;
  IO_L03N_7 F4;
  IO_L04P_7 F1;
  IO_L04N_7__VREF_7 F2;
  IO_L06P_7 G3;
  IO_L06N_7 G4;
  IO_L85P_7 G1;
  IO_L85N_7 G2;
  IO_L86P_7 H4;
  IO_L86N_7 G5;
  IO_L88P_7 H2;
  IO_L88N_7__VREF_7 H3;
  IO_L90P_7 J1;
  IO_L90N_7 H1;
 
// MGT's
  RXNPAD18 T13;
  RXNPAD19 T7;
  RXNPAD6 A7;
  RXNPAD7 A13;
  RXPPAD18 T12;
  RXPPAD19 T6;
  RXPPAD6 A6;
  RXPPAD7 A12;
 
  TXNPAD18 T10;
  TXNPAD19 T4;
  TXNPAD6 A4;
  TXNPAD7 A10;
  TXPPAD18 T11;
  TXPPAD19 T5;
  TXPPAD6 A5;
  TXPPAD7 A11;
 
  AVCCAUXRX18 R13;
  AVCCAUXRX19 R7;
  AVCCAUXRX6 B7;
  AVCCAUXRX7 B13;
  AVCCAUXTX18 R11;
  AVCCAUXTX19 R5;
  AVCCAUXTX6 B5;
  AVCCAUXTX7 B11;
 
  VTRXPAD18 R12;
  VTRXPAD19 R6;
  VTRXPAD6 B6;
  VTRXPAD7 B12;
  VTTXPAD18 R10;
  VTTXPAD19 R4;
  VTTXPAD6 B4;
  VTTXPAD7 B10;
 
  GNDA18 P11;
  GNDA19 P6;
  GNDA6 C6;
  GNDA7 C11;
 
// power and ground (see also MGT section)
 
  VCCO_0[ 3 ]  F8  F7  E8;
  VCCO_1[ 3 ]  F9  F10 E9;
  VCCO_2[ 3 ]  H12 H11 G11;
  VCCO_3[ 3 ]  K11 J12 J11;
  VCCO_4[ 3 ]  M9  L9  L10;
  VCCO_5[ 3 ]  M8  L8  L7;
  VCCO_6[ 3 ]  K6  J6  J5;
  VCCO_7[ 3 ]  H6  H5  G6;
 
  GND[ 28 ]    T16 T1  R2  R15 L6  L11 K9
               K8  K7  K10 J9  J8  J7  J10
               H9  H8  H7  H10 G9  G8  G7
               G10 F6  F11 B2 B15  A16 A1;
 
  VBATT  D15;
  VCCAUX[ 4 ]  R16 R1  B16 B1;
 
  VCCINT [ 8 ] N4  N13 M5  M12
               E5  E12 D4  D13;
 
 
$ENDPORTS
$ENDPART