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C++BOLD Example Design: TTM

// THIS FILE IS IN THE PUBLIC DOMAIN.
// IT IS PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT
// NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
 
#ifndef _TTM_AsmLinkH_
#define _TTM_AsmLinkH_
 
#include "ttm_rxtx.h"
#include "ttm_foxcvr.h"
#include "ttm_clocking.h"
 
// CM_AsmLink contains the link components for one ASM:  one Tx, one Rx, optoelectronics.
// Decoupling and other miscellaneous components are provided.
 
// CB_Asm_Back: Interface between one AsmLink and Backplane
 
class CB_Asm_Back : public TBundle {
public:
  CB_Rx_Back  RxA;
  CB_Rx_Back  RxB;
  CB_Tx_Back  Tx;
  port        SD_A;      // Xcvr's signal detect output
  port        SD_B;
 
  virtual void Register() {
    reg( RxA );
    reg( RxB );
    reg( Tx  );
    reg( SD_A );
    reg( SD_B );
  }
};
 
 
 
class CM_AsmLink : public TModule {  // link components for one ASM
 
public:
 
// ***** member bundles ***** //
  CB_Asm_CK    CK;
  CB_Asm_Back  Back;
 
// ***** member ports ***** //
  port VCC;     // 3.3V
  port GND;
 
 
// ***** member modules and parts ***** //
  CM_Wrapped1032  Tx;
  CM_Wrapped1034  RxA;
  CM_Wrapped1034  RxB;
  CM_WrappedXcvr  XcvrA;
  CM_WrappedXcvr  XcvrB;
 
  // decoupling
  enum { vc_tdc_count =  2 };              // >>> each AsmLink gets two TDC's
 
  CP_TDC_POS    VC_TDC[ vc_tdc_count ];    // tantalum decoupling
 
  virtual void Register() {
// bundles
    reg(  CK   );
    reg(  Back );
 
// ports
    reg(  VCC );
    reg(  GND );
 
 
// parts
    XcvrB.UseTransmitter( false );           // the transmitter in Xcvr1 is not used
    reg(  Tx );
    reg(  RxA );
    reg(  RxB );
    reg(  XcvrA );
    reg(  XcvrB );
    rega( VC_TDC, vc_tdc_count );
  }
 
  virtual void Connect() {
    wireall( GND );
    wireall( VCC );
 
    for ( int i = 0; i < vc_tdc_count; ++ i )  VCC << VC_TDC[ i ].POS;
 
    CK.RXCLK_A << RxA.REFCLK;
    CK.RXCLK_B << RxB.REFCLK;
    CK.TXCLK   << Tx.TXCLK;
 
    "HSIN_A_N"   << XcvrA.RD_N << RxA.HSIN_N;    // high-speed serial lines
    "HSIN_A_P"   << XcvrA.RD_P << RxA.HSIN_P;
 
    "HSIN_B_N"   << XcvrB.RD_N << RxB.HSIN_N;
    "HSIN_B_P"   << XcvrB.RD_P << RxB.HSIN_P;
 
    "HSOUT_N"   << XcvrA.TD_N << Tx.HSOUT_N;
    "HSOUT_P"   << XcvrA.TD_P << Tx.HSOUT_P;
 
 
    Back.Tx   << Tx.Back;
    Back.RxA  << RxA.Back;
    Back.RxB  << RxB.Back;
    Back.SD_A << XcvrA.SD;
    Back.SD_B << XcvrB.SD;
    
  }
};
 
#endif