CBOLD IROD Example Design: front

Coolquest, Inc.
C⁺⁺BOLD Example Design: IROD
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// THIS FILE IS IN THE PUBLIC DOMAIN.
// IT IS PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT
// NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
 
#ifndef _FrontPanelH_
#define _FrontPanelH_
 
#include "jtag.h"
#include "standardheaders.h"  // Emulator and JTAG headers
#include "switches.h"
#include "esd.h"
#include "mechanical.h"
 
// CB_Front_VME is in this file to avoid #include confusion in VME_Interface.h and FlashPLD.h
// CB_Front_VME: interface between FrontPanel and VME_Interface
class CB_Front_VME : public TBundle {
public:
  port LED_MB_VB;   // power-indicating LED's, driven by FlashPLD
  port LED_DSP_VB;
  port LED_DSP_VA;
  port LED_HPU0;    // general-purpose LED's, driven by FlashPLD
  port LED_HPU1;
  port LED_VME0;
  port LED_VME1;
 
  port DIPSW0_;      // DIP switches, input to FlashPLD
  port DIPSW1_;
  port DIPSW2_;
 
  virtual void Register() {
    reg( LED_MB_VB  );
    reg( LED_DSP_VB );
    reg( LED_DSP_VA );
    reg( LED_HPU0   );
    reg( LED_HPU1   );
    reg( LED_VME0   );
    reg( LED_VME1   );
 
    regb( DIPSW0_, 4, 0 );
    regb( DIPSW1_, 4, 0 );
    regb( DIPSW2_, 4, 0 );
  }
};
 
 
class CM_FrontPanel : public TModule {    // Front Panel Connectors, Switches, Displays
public:
 
// ***** member bundles ***** //
  CB_Front_CG    CG;      // interface to ClockGeneration subsystem
  CB_Front_IC    IC;      // interface to Interconnect subsystem
  CB_Front_JT    JT;      // interface to JTAG subsystem
  CB_Front_VME   VME;     // interface to VME_Interface subsystem
 
// ***** member ports ***** //
  port MB_VCC;      // 3.3V, motherboard
  port DSP_VCC;     // 3.3V, DSP's
  port MB_VCC5;     // for power-indicating LED only
  port GND;
 
 
// ***** member modules and parts ***** //
  CP_EMU_HEADER      EmuHeader;          // for TI TDS emulator
  CP_JTAG_HEADER     JTAG_Header;        // for JTAG boundary scan, FPGA configuration, CPLD In System Programming, etc.
  CP_TTC_HEADER      TTC_Header;         // for clock inputs, general-purpose signals to TTC FPGA (e.g., use for L1 trigger)
  CP_DIPSW5          Switch_JT_CG;       // see also the several DIP switches in FlashPLD.h
 
  CP_ESD_STRIP_400   ESD_Strip;          // ESD strip and resistors: see VME live-insertion standard
  CP_R1M_HW          ESD_Res[ 4 ];       // half-watt resistors --> higher breakdown voltage
 
  enum { hole_count = 4 };               // mounting holes for front panel
  CP_VME_PANEL_HOLE  PanelHoles[ hole_count ];
 
                                      // DIP switches and LED's connected to FlashPLD
  CP_DIPSW5           Switches[ 3 ];  // three switches, use determined by FlashPLD functionality
 
  CP_DUAL_LED_RT_GRN  LEDpwrVC;       // power LED's
  CP_DUAL_LED_RT_GRN  LEDpwrVB;
  CP_DUAL_LED_RT_GRN  LEDpwrVA5;
  CP_DUAL_LED_RT_RED  LEDhpu;         // LED's under HPU control
  CP_DUAL_LED_RT_RED  LEDvme;         // LED's under VME control
  CP_R110             Rled[ 11 ];     // one per LED, except two for MB_VCC5's LED
  CP_R0               Rgnd;           // shared by all LED's not driven by PLD, for easier soldering
 
 
  virtual void Register() {
// bundles
    reg( CG );
    reg( IC );
    reg( JT );
    reg( VME );
 
// ports
    reg( MB_VCC );
    reg( DSP_VCC );
    reg( MB_VCC5 );
    reg( GND );
 
// parts and modules
    reg( EmuHeader    );
    reg( JTAG_Header  );
    reg( TTC_Header   );
    reg( Switch_JT_CG );
 
    reg(  ESD_Strip    );
    rega( ESD_Res, 4   );
 
    rega( PanelHoles, hole_count );
 
    rega( Switches, 3 );
    reg(  LEDpwrVC  );
    reg(  LEDpwrVB  );
    reg(  LEDpwrVA5 );
    reg(  LEDhpu    );
    reg(  LEDvme    );
    rega( Rled, 11  );
    reg(  Rgnd      );
  }
 
  virtual void Connect() {
    wireall( GND );
 
    wire( JT.JTAG, JTAG_Header );
    "/NC"  <<  JTAG_Header.BYPASS_N;    // not used
    "/NC"  <<  JTAG_Header.P_ENA;       // not used
    "/NC"  <<  JTAG_Header.TRST_N;      // not used
    MB_VCC <<  JTAG_Header.VCC;         // motherboard power to JTAG pod
 
    wire( JT.Emulator, EmuHeader );
    JT.TCK_RET  << EmuHeader.TCK_RET;
    "/NC"       << EmuHeader.KEY;  // missing pin:   no-connect
    DSP_VCC     << EmuHeader.PD;   // power-detect:  attach to DSP_VCC
 
    wire( CG, TTC_Header );
    wire( IC, TTC_Header );
 
    merge( GND, Switch_JT_CG.A );    // orient with row A pins near board edge
 
    Switch_JT_CG.B( 2, 0 )  << JT.JTAG_DIPSW( 2, 0 );
    Switch_JT_CG.B( 3    )  << CG.CKOE_DIPSW;
    Switch_JT_CG.B( 4    )  << CG.VBOE_DIPSW;
 
// ESD
// Front panel connects directly to front contact of ESD strip
    "ESD_FRONT"  <<  ESD_Strip.FRONT;
    for ( int i = 0; i < hole_count; ++ i ) {
      "ESD_FRONT" ^ PanelHoles[ i ];        // may as well connect all panel holes to ESD discharge path
    }
 
// Front panel connects via two series resistors to rear contact of ESD strip
    "ESD_FRONT"  ^ ESD_Res[ 0 ] ^  "ESD_0_1"  ^ ESD_Res[ 1 ] ^ "ESD_REAR"  <<  ESD_Strip.REAR;
 
// circuit ground connects via two series resistors to middle contact of ESD strip
    GND          ^ ESD_Res[ 2 ] ^  "ESD_2_3"  ^ ESD_Res[ 3 ] ^ "ESD_MID"   <<  ESD_Strip.MID;
 
 
// LED's and DIP switches associated with FlashPLD
// LED 0 is located nearest the motherboard, LED 1 is above it
    int i = 0;
 
    MB_VCC   ^ Rled[ i++ ] ^  "LED_MB_VCC"   <<   LEDpwrVC.ANODE( 0 );   // MB_VCC
    DSP_VCC  ^ Rled[ i++ ] ^  "LED_DSP_VCC"  <<   LEDpwrVC.ANODE( 1 );   // DSP_VCC
    MB_VCC   ^ Rled[ i++ ] ^  "LED_MB_VB"    <<   LEDpwrVB.ANODE( 0 );   // MB_VB
    MB_VCC   ^ Rled[ i++ ] ^  "LED_DSP_VB"   <<   LEDpwrVB.ANODE( 1 );   // DSP_VB
    MB_VCC5  ^ Rled[ i++ ] ^  "LEDV5";                                   // additional resistor for MB_VCC5
    "LEDV5"  ^ Rled[ i++ ] ^  "LED_MB_VCC5"  <<  LEDpwrVA5.ANODE( 0 );   // MB_VCC5
    MB_VCC   ^ Rled[ i++ ] ^  "LED_DSP_VA"   <<  LEDpwrVA5.ANODE( 1 );   // DSP_VA
 
    MB_VCC   ^ Rled[ i++ ] ^  "LED_HPU0"     <<     LEDhpu.ANODE( 0 );   // controlled by HPU
    MB_VCC   ^ Rled[ i++ ] ^  "LED_HPU1"     <<     LEDhpu.ANODE( 1 );
    MB_VCC   ^ Rled[ i++ ] ^  "LED_VME0"     <<     LEDvme.ANODE( 0 );   // controlled by VME
    MB_VCC   ^ Rled[ i++ ] ^  "LED_VME1"     <<     LEDvme.ANODE( 1 );
 
    "LED_GND"  ^ Rgnd ^  GND;   // for easier soldering --> better LED life
 
    "LED_GND"        <<   LEDpwrVC.CATHODE( 0 );   // MB_VCC
    "LED_GND"        <<   LEDpwrVC.CATHODE( 1 );   // DSP_VCC
 
    VME.LED_MB_VB    <<   LEDpwrVB.CATHODE( 0 );   // MB_VB
    VME.LED_DSP_VB   <<   LEDpwrVB.CATHODE( 1 );   // DSP_VB
    "LED_GND"        <<  LEDpwrVA5.CATHODE( 0 );   // MB_VCC5
    VME.LED_DSP_VA   <<  LEDpwrVA5.CATHODE( 1 );   // DSP_VA
 
    VME.LED_HPU0     <<     LEDhpu.CATHODE( 0 );   // controlled by HPU
    VME.LED_HPU1     <<     LEDhpu.CATHODE( 1 );
    VME.LED_VME0     <<     LEDvme.CATHODE( 0 );   // controlled by VME
    VME.LED_VME1     <<     LEDvme.CATHODE( 1 );
 
// DIP switches
    merge( GND, Switches[ 0 ].A );    // orient with row A pins near board edge
    merge( GND, Switches[ 1 ].A );
    merge( GND, Switches[ 2 ].A );
 
    VME.DIPSW0_  <<  Switches[ 0 ].B;  // pullups and other connections are in VME_Interface subsystem
    VME.DIPSW1_  <<  Switches[ 1 ].B;
    VME.DIPSW2_  <<  Switches[ 2 ].B;
  }
};
 
#endif
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